The evaluation of modeling languages for augmented reality applications poses particular challenges due to the three-dimensional environment they target. The previously introduced Augmented Reality Workflow Modeling Language (ARWFML) enables the model-based creation of augmented reality scenarios without programming knowledge. Building upon the first design cycle of the language's specification, this paper presents two further design iterations for refining the language based on multi-faceted evaluations. These include a comparative evaluation of implementation options and workflow capabilities, the introduction of a 3D notation, and the development of a new 3D modeling environment. On this basis, a comprehensibility study of the language was conducted. Thereby, we show how modeling languages for augmented reality can be evolved towards a maturity level suitable for empirical evaluations.

SAN FRANCISCO, Nov. 23, 2021 (GLOBE NEWSWIRE) -- Rescale, the leading hybrid cloud high performance computing (HPC) platform enabling intelligent computing for digital R&D, today announced it has closed $105 million in an expanded Series C funding round. Existing and new investors in the company include Sam Altman, Jeff Bezos, Richard Branson, Paul Graham, Peter Thiel, Fort Ross Ventures, Gaingels, Gopher, Hitachi Ventures, Initialized Capital, Keen Venture Partners, Microsoft M12, Nautilus Venture Partners, NVIDIA, Prometheus Capital, Republic Labs, Samsung Catalyst Fund, Solasta Ventures, Yield Capital Partners and more. The valuation was not disclosed. Rescale's announcement today follows a dramatic acceleration in customer demand, investor interest and market momentum, bringing the company's total funding to date to over $155 million. With over 200 enterprise customers, and year-over-year sales growing over 2x in 2021, Rescale is accelerating the digital transformation of the computational science and engineering discipline, which has traditionally been on-premises in private data centers but is rapidly shifting to cloud.

Autonomous vehicle technology is almost ready for widespread deployment--but people aren't ready for autonomous technology. This is because they don't yet trust the technology to make decisions fully on its own--thus inhibiting driver-assisted vehicles from transforming to truly autonomous vehicles. We accept a certain level of failures in technology like our laptops, smartphones and Wi-Fi because those limitations are merely inconveniences and we can live with that. Building a vehicle requires safety, security and automotive-quality considerations. But when it comes to technology where our lives are dependent on its performance, we have to hold it to a higher standard.

"Startups" in semiconductor chip design space had been a rarity since the dot-com crash in the early 2000s. Chip design requires massive development cost as design cycles are multi-year long with dependence on (1) expensive EDA (Electronic Design Automation) tools for design and (2) foundries for manufacturing -- both of which are highly advanced technologies with very few players in the world. Long design cycles from the conception of an architecture specification to its tapeout (tapeout is when a chip design is frozen & sent to a semiconductor foundry for manufacturing) plus time it takes to develop a SW stack to program new architectures further delays the point of revenue generation for such companies. Initial high investment costs with delayed revenue and delayed improvement in gross-margin had caused major market consolidations after the 2000 dot-com crash and had made semiconductor chip startups less attractive for venture capital funding. However the advent of AI in the last 8 years with its unique computational requirement has exposed newer opportunities for domain-specific ASICs to be, once again, a high-risk-high-gain proposition for venture funding. Introduction of Tensor Processing Unit (TPU), which is a chip designed specifically for Deep Learning (DL constitutes most of AI these days), by Google in 2017 demonstrated the possibility of building a domain-specific chip solution by a new player (new in terms of building ASICs) and cross validated the presence of a lucrative market for investors.

Artificial intelligence (AI) and machine learning (ML) come in many shapes, but whatever the intelligence looks like, it is all results-focused. If there is a clear "right way" and "wrong way" to do something, AI needs to demonstrate an ability to follow the "right way." More pertinently, systems that employ AI must work out how to get there on their own and get better at doing it over time. Electronic design automation (EDA) work is the ideal task for AI. The complexity of integrated circuits (ICs) means the number of possible design iterations that need to be evaluated continues to increase, but their regularity means design rules that work well can have a massive positive impact across large parts of the design.

Maybe you dream about taking your electronic designs to manufacturing without first validating their operation. All of those simulation steps take so much effort, and time-to-market pressures are relentless. But, of course, you'd never dare do it. What if you had an effective way to streamline the simulation-based verification process? Machine learning could be your answer, says Elyse Rosenbaum, professor of electrical and computer engineering at the University of Illinois at Urbana-Champaign.